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Methodics - Webinar -  New Concepts in Semiconductor IP Lifecycle Management - June 8 from 10 - 11AM PDT

Methodics - Webinar - New Concepts in Semiconductor IP Lifecycle Management - June 8 from 10 - 11AM PDT


June 8 from 10 - 11AM PDT

New Concepts in Semiconductor IP Lifecycle Management

Today's complex SoC design requires a new level of internal and external design traceability and reuse by tightly coupling IP creators with IP consumers. Join us for the introduction of an exciting new platform that allows companies to provide the transparency and control needed to streamline collaboration by providing centralized cataloging, automated notifications to design teams, flexible permissions across projects, and integrated analytics across diverse engineering systems. Come see how companies are realizing substantial cost and time to market savings by adopting IP lifecycle management methodologies.

Please CLICK HERE to register for the webinar.


WEBINAR April 27 from 10 - 11AM PDT Co-Hosted by Methodics and Jama Software

WEBINAR April 27 from 10 - 11AM PDT Co-Hosted by Methodics and Jama Software


April 27 from 10 - 11AM PDT

Co-Hosted by Methodics and Jama Software


"Connecting Requirements to IP: Achieving Requirements Traceability from Ideation through Test"

Increasing semiconductor complexity is creating headaches for product teams as they struggle to manage customer requirements from product design through testing. More than 40% of all new product starts fail or are abandoned due to requirements traceability or requirements management issues. Furthermore, certain industries like automotive, aerospace and medical device manufacturers need to prove compliance with demanding and challenging standards including:

  • ISO26262
  • IEC61508
  • IEC62304
  • DO178B
  • 21CFR820.30
  • CMMI

Please CLICK HERE to register for the webinar to see how Methodics, the leading semiconductor IP management solution provider, and Jama Software, industry leader in Requirements Management, are solving these issues by creating a solution to connect requirements to IP and deliver Requirements Traceability from product ideation through design and test.

March 2017 Newsletter

March 2017 Newsletter

Untitled Document
Methodics News

Welcome to Our Q1 2017 Newsletter

2016 was another great year for Methodics! Our IP Management platform is continuing to see a lot of traction amongst folks interested in leveraging their existing design assets and deploying a traceable project workflow.  And 2017 is looking even better with major new customers and partnerships in the works!  We're seeing that an IP management and IP reuse methodology is something the semiconductor space really needs and is moving towards across the board.

In other news, we have two webinars scheduled in April.  The first is on April 13 hosted by Daniel Nenni of SemiWiki to introduce new concepts in semiconductor IP Lifecycle Management.  Please click here for more information and to register today.

The second webinar is on April 27 with our friends at Jama Software as part of our technology partnership with them.  Jama provides software solutions for requirements management.  For anyone who wants to include requirements in their IP metadata and releases, this webinar will be invaluable.  Please click here to register.

We're also proud to be exhibitors and presenters at the upcoming CDNLive events in Santa Clara and EMEA.  See below for more details.

In February, our CTO, Peter Theunis, gave a great interview to the folks at SemiWiki. Lots of insight into how Digital Asset Management and Semiconductors are coming together, and some discussion of the infrastructure requirements to handle massive amounts of data. For those of you who aren't aware, Peter is a systems expert with experience in building scaleable infrastructure at enterprise companies like Yahoo. These talents are really helping us build world class enterprise products at Methodics.

On the product front, as our ProjectIC 2.0 momentum grows, we've been doubling down on performance and features. The latest release has been focused on massive dataset performance optimization with an eye on the next generation of SoC designs with 10's of terabytes of data.  More details on this will be coming soon.

Finally, be sure to watch for our next newsletter with information on our DAC booth schedule... we'll be announcing an exciting line-up of presentations in our own theater by customers and technology partners, including Perforce and Jama.

If one or more of the topics covered in this newsletter grabs your interest, please email and let us know if you'd like to hear more about it.

Best Regards,

Upcoming Webinars

Please join us at our upcoming webinars.  To register, click on the links in the table below to the left.

The first is hosted by Daniel Nenni of SemiWiki on April 13th and is titled "Introducing New Concepts in Semiconductor IP Lifecycle Management"

SemiWiki Logo


The second is co-hosted on April 27th with one of our new technology partners, Jama Software, and is titled "Connecting Requirements to IP: Achieving Requirements Traceability from Ideation through Test."

Jama Logo

Upcoming Webinars and Events

Methodics is excited to be offering the webinars listed below and to be an exhibitor at the events listed. 

At CDNLive-Silicon Valley, we will also be presenting a joint paper  with our good partner, Perforce, titled "Meeting Time-to-Market and Cost Reduction Goals Through Platform Based Design" on Tuesday, April 11 at 1:30pm.

For more information or to register for the webinars and events, please click on the links below.  We look forward to seeing you there!

Location Date Webinar Title or Event
Santa Clara,
Exhibit and Presentation
CDNLive - Silicon Valley - 2017

"Meeting Time-to-Market and Cost Reduction Goals through Platform Based Design"
1:30 pm
in the Tensilica & Design IP track

Methodics & SemiWiki Webinar
10:00AM PDT
Introducing New Concepts in Semiconductor IP Lifecycle Management

Methodics & Jama
10:00AM PDT 4/27/2017
Connecting Requirements to IP: Achieving Requirements Traceability from Ideation through Test

5/15 - 5/17/2017 CDNLive - EMEA - 2017
6/18 - 6/22/2017
DAC 2017

To schedule a meeting or learn more, email  We hope to see you there!

CDN-Live-Santa Clara-2017-logo


DAC54 logo

White Paper: Integrating Requirements Management with IP Management

Given the semiconductor industry's important goal of implementing IP reuse strategies to reduce development costs, improve time-to-market, and remain profitable in today's highly competitive SOC marketplace, it is important to integrate requirements management tools such as Jama into your IP Lifecycle Management (IPLM) system.  This white paper provides details on how this is accomplished by using ProjectIC.


Website Highlights

April 13 Webinar Info and Registration:  Introducing New Concepts in Semiconductor IP Lifecycle Management
April 27 Webinar Info and Registration: Connecting Requirements to IP: Achieving Requirements Traceability from Ideation through Test
: Integrating Requirements Management with IP Management
SemiWiki Blog: CTO Interview: Peter Theunis of Methodics
SemiWiki Blog: SOC Integration using IP Lifecycle Management Methodology

December 2016 Newsletter

December 2016 Newsletter

Untitled Document
Methodics News

Welcome to Our December Newsletter!

First, let me wish everyone a Happy Holiday Season and a very prosperous 2017!  As we anticipated last year, 2016 has been full of exciting news at Methodics.

Our next generation IP Management platform (codenamed "Tau" to those of you in the know) is in production and is proving to be the major leap in performance and functionality that we predicted. We'll be doing some in-depth write ups on this in the near future, but suffice to say our competitors are going to be groaning when they catch wind of its feature set and performance.

On the WarpStor front, we've had a number of big successes  including a contract in Q4 with a major Korean customer.  The case study language is still getting vetted by the legal folks at the moment, but look for a press release in the New Year.  And, at another key customer, WarpStor is creating 200GB workspaces in 14s (down from 30mins) in their NFS environment and reducing the workspace sizes down to 100KB!  You can review that case study here.  These represent huge wins and validation of our technology in very demanding environments.

For some background on our IP motivations you can take a look at the interview I did with the good folks over at SemiWiki in November.  Managing IP has been a passion of ours since 2010 and is now our main raison-d'etre. Daniel did a good job pulling together the whole story.

Our relationship with Magillem continues to grow in scope and, in November, we were part of their Silicon Valley User Conference. There is a lot of synergy between our 2 companies and we're very focused on delivering those use models in our tools. See our Magillem Integration data sheet for more details.

Finally, on the technology front, we released our "Single Source of Truth Architecture" white paper that discusses the merits of a centralized data and IP management approach to facilitate reuse, transparency, and collaboration between multi-site design teams

If one or more of the topics covered in this newsletter grabs your interest, please email and let us know if you'd like to hear more about it.  We'd be happy to arrange a personal meeting for you.

Best Regards,

Happy Holidays

ProjectIC logo

ProjectIC provides a 'Single Source of Truth' Architecture for Design Teams

ProjectIC Diagram

Magillem Logo

WarpStor Helps Fabless SOC Company Drastically Reduce Workspace Creation Time, Storage Usage, and IOPs!

In this customer environment, 150 - 200GB workspaces are common and previously took up to 30 minutes to fully populate. In addition, Filer IOPs and NFS latencies associated with delivering data to user workspaces were excessive and were a source of slowness on the network.

After installing WarpStor, user workspace creation time was reduced to 14 seconds, workspace sizes decreased from 150 - 200GB to only 100KB, and total IOPs were reduced by more than 70% during write bursts.

To read the details, please download the Case Study here.

WarpStor Logo

"The WarpStor / Perforce combination has made incredible improvement over the raw performance of building workspaces, both in terms of disk space consumed and time to sync files.  Methodics has made some real innovations in the storage space to address our large data-set issues"

      - Staff CAD Engineer

White Paper: Leveraging 'Single Source of Truth' Architecture to Speed Development Times, Improve Design Quality, and Reduce Risk

Many Design Management (DM) tools used by the Semiconductor Industry today are based on outdated, proprietary version control systems and have fallen significantly behind the state of the art. These tools are often only capable of supporting a single project per server due to the severe scalability and performance limitations inherent in their underlying technology.  This ‘server per project’ limitation silos teams and their information, preventing sharing and reuse across the organization.

In contrast, modern DM tools built on industry standard version control systems take a centralized, IP based approach; information about the development status of every project can be communicated freely and immediately across the organization, and across distributed teams. Modern tools leverage a ‘Single Source of Truth’ architecture to enable Platform Based Design - an integration based approach that systematically leverages design reuse and established platforms to speed development times, improve quality, and reduce risk.


Website Highlights

Whitepaper: Leveraging 'Single Source of Truth' Architecture to Speed Development Times, Improve Design Quality, and Reduce Risks
WarpStor Case Study:  Fabless SOC Company - Creating Large Workspaces with WarpStor
SemiWiki Blog: CEO Interview: Simon Butler of Methodics
SemiWiki Blog: IC Design Management: Build or Buy
Datasheet:  Methodics/Magillem Integration

May 2016 Newsletter

May 2016 Newsletter

DAC 2016 in Austin will be another exciting event for Methodics.  We'll be featuring the second major release of our IP Lifecycle Management platform, ProjectIC, along with a new release of WarpStor, our partnerships with Perforce and Magillem, hula dancers, and much more!

Untitled Document
Methodics News

Welcome to Our DAC 2016 Newsletter!

Hi there, and welcome to the last newsletter before the main conference of the year, DAC!

This is going to be our best DAC ever! I know, I know, all vendors like to say that, but for us this year its really true.

First up, we have some incredible live Hawaiian dance performances at our booth (twice daily) to break up the demo/sales-pitch/swag-grab grind. This is part of our “Go Native” theme for integrating native data tools (such as Perforce) into our IP Management flow. Every other vendor in the data/IP management space is trying to sell you a proprietary “closed” system solution, ultimately with the goal of locking you in. Don’t do it! .. Go Native!

And by the way, we'll have several of our friends from Perforce joining us at our booth this year too.  Please be sure to stop by to meet with them and hear more about the advantages of adopting native Perforce.

Also we’ll be announcing the next release of our flagship product, the ProjectIC 2.0 IP Lifecycle Management (IPLM) solution with a focus on Platform Based Design. This new release is a major step forward for us and includes performance improvements, richer API’s, and some killer new features. Platform Based Design is a process that is getting increasing amounts of traction in today's IP-centric Semiconductor design environment.  How ProjectIC 2.0 can facilitate this is discussed in a new white paper here.

Finally, we’ll be announcing a new release of WarpStor with new features and integrations to help reduce your workspace creation/management and release bottlenecks. We’ll also be presenting some customer success stories to help explain how this technology has helped other companies in the Semiconductor space.

I hope to see all of you in Austin on June 6th!

Best Regards,

P.S. - If one or more of the topics covered in this newsletter grabs your interest, please email and let us know if you'd like to hear more about it.

DAC 2016 Logo

Austin Convention Center

ProjectIC Logo

WarpStor Logo

VersIC Logo

Perforce Logo

Come see us at DAC 2016 in Austin

It's DAC time again, and Methodics once again has a lot happening!  Please visit us at booth #1019 at the Austin Convention Center, to learn about  exciting advances in our technology:

  • ProjectIC v2.0 - This second major release of our flagship IP Lifecycle Management (IPLM) solution enables platform-based design... an industry-first!

  • WarpStor - our engineering workspace, diskspace, and IO bandwidth optimizer is helping customers drastically reduce costs and improve time-to-market.  See the links below for customer success stories.

  • Integration with Magillem tools to provide a fully synchronized IPLM and SoC assembly environment, assuring that designs can be quickly assembled and kept up to date with changes in the underlying IP.

We are also excited to be involved in other activities around the show including a presentation at the Cadence Theater at 1:30pm on Wednesday, June 8 titled "IP Lifecycle Management - Enabling Platform Based Design"

To pre-schedule a private meeting at our booth or learn more, email

And, on a final note...  Please drop by our booth to pick up a special gift and qualify for our our daily fitbit give-away!

Magillem Logo

Hawaiian Lei

Fitbit One

White Paper: Meeting Time-to-Market and Cost Reduction Goals Through Platform Based Design

   by: Michael Munsey, VP of Business Development and Strategic Accounts

Companies designing today's complex System-on-Chips (SoC’s) must find new ways to meet the challenges imposed by shrinking time-to-market windows and cost pressures.  Platform based design methodologies allow companies to reduce the time it takes to bring designs to market and maximize reuse of internal IP on those designs.

A platform is the starting point for a new or derivative design that contains all of the IP and design meta data properly configured to be downloaded to a user's workspace.  To enable a platform based design methodology, companies must formalize how design IP is handled.

By adopting an IP Lifecycle Management solution (IPLM), companies can benefit from streamlining the SoC development process and guarantee that IP is being fully utilized through all of the company’s design projects.


Website Highlights

Whitepaper: Meeting Time-to-Market and Cost Reduction Goals Through Platform Based Design
Press Release: Methodics Expands Worldwide Sales Team to Meet Strategic Initiatives
Press Release:
Methodics and Magillem Team Up to Deliver an Industry First IP Assembly Platform Based Development Environment
Award Announcement: Methodics receives 2016 Perforce award for "Most Innovative Integration"
SemiWiki Blog: Bulking Up of Design Data Calls for Version Control on Steroids
WarpStor Case Study 1: A U.S. Based Flash Memory Company
WarpStor Case Study 2
: A Fabless SoC Design Company

February 2016 Newsletter

February 2016 Newsletter

Welcome to Our Q1 2016 Newsletter

                 WarpStor Video Please be sure to click on the image above to see how WarpStor - our Network Attached Storage (NAS) and  engineering workspace optimizer/accelerator - drastically reduces storage and IO bandwidth requirements and the time it takes to create and open engineering workspaces.

                 WarpStor Video

Please be sure to click on the image above to see how WarpStor - our Network Attached Storage (NAS) and  engineering workspace optimizer/accelerator - drastically reduces storage and IO bandwidth requirements and the time it takes to create and open engineering workspaces.

This quarter we've had a lot of new announcements and generally this is a very exciting time for Methodics!

First up, I’d like to welcome SangHo Park as our Technical Sales Director in Korea. Sangho has many years managing sales and applications in Korea, most recently at DaouIncube, and is a very strong addition to the team. 

We also issued a press release recently discussing our 2015 company performance. Last year, we were able to double bookings, and a lot of that growth came from displacing our competitors. Our native integration of industry standard CM tools such as Perforce and Subversion continues to be a compelling story with customers, and our ProjectIC IP management platform continues to win every benchmark we engage in. 

In January, we won the “Rookie of the year” award at the Perforce partner conference.  We aren’t actually rookies of course, since our Perforce integration has been in place for over 7 years, but 2015 saw the launch of our formal business and Reseller relationship with Perforce, and the award was a nice way to celebrate that. 

Last month also saw the release of a new white paper discussing our IP integration workflow. This is a unique capability of the ProjectIC platform and of extreme value to our SoC integration users. 

Finally, just a mention that we’ll be at the CDNLive conference in Santa Clara and at the Perforce MERGE conference in San Francisco.  Both events take place in April.  Please feel free to swing by - these will be the start of our DAC ramp up where we’ll be announcing a number of surprises in Austin for y’all!

If one or more of the topics covered in this newsletter grabs your interest, please email and let us know if you'd like to hear more about it.

December 2015 Newsletter

December 2015 Newsletter

Welcome to Our December Newsletter!

First, let me wish everyone a Happy Holiday Season and a very prosperous New Year.  At Methodics, 2015 has been an exciting year: we've introduced new products, doubled our sales, signed a partnership and reseller agreement with Perforce,  added lots of new customers, and added new distributors in key locations.  We look forward to an even more exciting 2016!

For starters, we would like to welcome David DePaula on board as our Director of Sales, EMEA beginning January 1st.  David brings more than 18 years of sales and business development experience in the semiconductor and EDA industry, including 7 years developing the sales of Synchronicity/Dassault Systemes in Europe from 2005 to 2012.

We've also added a new distributor in Taiwan and China, Graser Technology. Graser have been a Cadence channel partner for a number of years and we’re very happy to be working with them.

On the technology front…

This newsletter includes two new white papers with a focus on optimizing your design environment infrastructure:

The first is called "Best Practices for Perforce Based Hardware Design and is the product of many internal discussions we’ve had with the Perforce applications team and our existing customer base around the topic of SoC design methodologies in a Perforce/ Methodics tool environment. This methodology guidance should be a great help to any new customers considering Perforce in a hardware context, and reflects the design flow implementations at many of our most successful customers.

The second white paper is titled "Managing Your Design Environment in an IP-centric Design Methodology and is a overview of how to treat EDA tools and other environment configurations as “IP’s” in a project configuration.

We’ve also collaborated on two SemiWiki blogs focused on improved IP development & reuse methodologies:

Again, these reflect road-tested methodologies for leveraging reuse from your existing Semiconductor IP assets, and managing dynamic and evolving project design data in an IP-centric environment.

If one or more of the topics covered in this newsletter grabs your interest, please email and let us know if you'd like to hear more about it.  We'd be happy to arrange a personal meeting for you.

September 2015 Newsletter

September 2015 Newsletter

Hello and welcome to our Q3 Newsletter!

Methodics is now a Perforce Partner!

Read how Methodics ProjectIC works together with Perforce Helix Threat Detection to secure your SoC IP:

We have some great news to share in this month's newsletter. 

First up is our new Perforce relationship - We’re now official reseller partners with Perforce, which means we’re now selling fully bundled ProjectIC/VersIC/Perforce solutions. Please contact our sales team for more information. For pre-existing Perforce users, this won’t necessarily have a big impact since our tools will continue to work with their existing Perforce installations, but this new relationship should simplify new Perforce deployments quite a lot.

                     Click the image above to download the WarpStor data sheet.


                   Click the image above to download the WarpStor data sheet.

We’ve also had a tremendous reaction to our WarpStor appliance announcement at DAC and during many follow up evaluations. As a reminder, our WarpStor appliance is the answer to the data-explosion issues so many of our customers are suffering from. WarpStor will reduce your disk-space requirements, IO-bandwidth, and NFS latencies by using smart block-level data optimizations. This was discussed in a previous blog-post and white paper, and will be the subject of a forth-coming webinar.  Please watch for more details on this webinar in the October time-frame.

Finally, with all this talk of data-explosion, big-data concepts, and the interesting analytics that are usually associated with this, I’d like to point you to our latest white-paper, "Threat Detection through Big Data Analytics: A Proactive Approach to Securing SoC IP Design Data”. This discusses the use of ProjectIC in conjunction with the Perforce big-data analytics platform to give deeper insight into your design activity, and nip in the bud possible IP theft and other infringements before an incident occurs.

If one or more of the topics covered in this newsletter grabs your interest, please email and let us know if you'd like to hear more about it.  We'd be happy to arrange a personal meeting for you.


Overwhelming response to WarpStorTM - Webinar coming in October!

In one of our many announcements at DAC this year, we introduced our revolutionary Network Attached Storage (NAS) and engineering workspace optimizer and accelerator, WarpStor.  The WarpStor technology can save not only enormous amounts of disk space and IO bandwidth, but also enormous amounts of workspace creation and check-in / check-out time.  In case you missed it, you can read the announcement here.

The response to that announcement has been overwhelming, so we are scheduling a 1 hour webinar in October.  Please watch for a separate email for the exact date and time of this upcoming webinar.

White Paper: Threat Detection through Big Data Analytics

As semiconductor engineering teams grow in size and become increasingly more distributed across multiple sites around the world, the proprietary and confidential System-on-a-Chip (SoC) and semiconductor intellectual property (IP) design data sets have grown to 10’s or 100’s of Gigabytes.  Securing this data has become a huge challenge. It is no longer sufficient to secure data within the walls of a single company site.  Data now must be secured within the collaborative teams that share that data across international boundaries.

To solve the complete IP security problem and successfully protect IP design data, companies must look to technologies that support both IP and file-level security and big data-centric threat detection. This paper outlines the characteristics and advantages of such a solution.


Website Highlights

Product Highlights: WarpStor
WhitepaperThreat Detection through Big Data Analytics
Whitepaper: Architected for Multi-Site Collaboration
Whitepaper: Hierarchical IP Subsystems
SemiWiki Blog: WarpStor, The Data Tardis, Small on the Outside, Large on the Inside
SemiWiki BlogThreat Detection - How To Keep the Crown Jewels Secure
Press Release: Perforce and Methodics Partner to Support Rapid, High-Volume IP Management
Press Release: Methodics Unveils WarpStor
Press Release: Methodics Partners with Bedrock Technology to Expand U.S. Sales Channel

May 2015 Newsletter

May 2015 Newsletter

Hi Again, and welcome to our DAC Newsletter!

At this year's conference we have a number of exciting announcements. The first (and most exciting) is WarpStorTM, our content aware, network storage accelerator.  If you’re in the position where you’re continually running out of disk space, or your workspace load and updates are taking forever due to NFS and IO bandwidth restrictions, this is the tool for you!  WarpStor is technology agnostic and will work with your existing NetApp, EMC, Dell, Fujitsu, or other storage solutions and standard backups, plugs into your NFS configuration with no client kernel changes, and causes minimal disruption to your existing IT infrastructure.  We’ve been using this technology for over a year as part of our internal regressions flow, and it has helped us tremendously.  I hope it can help you also.   More information here and a datasheet can be downloaded here.

Next up, we’re announcing a new channel through Bedrock Technology Partners.  Bedrock will be helping us expand our sales presence in the U.S. and with their focus on systems solutions, we expect them to enable the sale of WarpStor and other appliances we have in the pipeline.  We’re looking forward to working with Tom, Ravi, Avinash, Mark, and the entire Bedrock team!

We’re also announcing a new ProjectIC integration, this time to the ARM Socrates IP integration toolsuite.  We’ll be showing a seamless IP release and SoC integration at our booth.  Please email us at to schedule a personal demo.

Finally, we've made available a new white paper on the topic of Hierarchical IP management.  Please take a look and give us your feedback.

If you're coming to DAC, I look forward to seeing you there!  If not, please email and let us know if you're interested in hearing more about any of our technologies.  We'd be happy to arrange a private demonstration for you.

Best Regards,

Achieve Big Savings in Workspace Creation Time, Disk Storage Costs, and IO Bandwidth Requirements

Come See Us at DAC 2015

It's DAC time again, and Methodics once again has a lot happening!  Please visit us at booth #1114, to learn about our exciting new technology:

  • WarpStor for drastically reducing storage costs, IO bandwidth requirements, and workspace creation time

  • The latest advancements in ProjectIC and VersIC for IP Lifecycle and IP-centric Design Management

  • Integration with ARM Socrates tools that enable their partners to configure and integrate ARM IP with 3rd party IP

We are also excited to be involved in other activities around the show including:

  • "IP is Dead. Long Live IP!"
    Vishal Moondhra, VP of Applications
    Tuesday, June 9, 1:30 pm in the IP Track (Room 101)

  • “Producing Analog/Mixed-Signal IP Requires a Best-in-Class Design Flow”
    Simon Butler, CEO
    Wednesday, June 10, 10:30 am at the Cadence Theater (Booth #3515)

To pre-schedule a private meeting at our booth or learn more, email

And, on a final note...  Please drop by our booth to enter our daily drawing for a set of cool Beats headphones!

White Paper: Hierarchical IP Subsystems

by: Vishal Moondhra, VP of Applications, Methodics

Most practical SoCs are more than just a collection of IPs and custom development. There is a clear hierarchy associated with the IPs that are used, and there are many advantages to managing your designs in a hierarchical way.  This paper examines those advantages.

read more

March 2015 Newsletter

March 2015 Newsletter

Welcome to Our March Newsletter!

by: Simon Butler, CEO, Methodics

First, I’d like to mention that the results of our 2014 IP Management and Reuse survey are in and make for some really interesting reading.

When we first introduced ProjectIC back in 2010, we predicted IP reuse was going to become an important topic in the design space. Now, our survey results indicate that this really is the case.  Detailed survey results are available on our website - there are some interesting insights in there. I want to thank each of our respondents for taking the time to provide their perspective.

Next, I want to extend my congratulations to Meghana Sardesai from Maxim Integrated for being the lucky winner of our Pebble smart watch giveaway last month!

And while I'm on the topic of IP Reuse, I'm happy to announce the first in a series of coming releases that I alluded to in the last newsletter - indie Semiconductor has selected ProjectIC as their next generation IP management solution!

In other news, our CTO, Peter Theunis, was interviewed by SemiWiki last month. Peter was a great hire for us with his Yahoo Software and systems background and is leading the drive to maximize our tools' scalability and enterprise readiness. You can read the entire interview by following the link above.

On the technical front, we published a new white paper, written by our VP Applications, Vishal Moondhra, discussing the "Update Modes" feature in the ProjectIC workspace management environment. These new features can make a significant difference to designers who need a more targeted approach to making IP releases.

Finally, we’ll be exhibiting at DATE in Grenoble, and at CDNLive-Silicon Valley and SNUG-Silicon Valley in Santa Clara, CA this month. 

If you’d like to see a demo please email events@methodics.comand we’ll set something up. 

Hope to see you there!

December 2014 Newsletter

December 2014 Newsletter

Welcome to our December Newsletter!

A lot of great things have been happening since our last update, including some important ProjectIC customer wins (public announcements coming soon), significant new features in our tools, and some fun conferences!

In this letter, I have the pleasure of including a customer success story from Dr. Achim Graupner, one of our long time VersIC customers. Achim’s team has focused on Subversion as their corporate DM solution and talks about how he’s been able to successfully roll this out to his multi-site organization. Subversion and Perforce are the 2 most popular corporate configuration management solutions today, although Git is starting to make inroads (especially for RTL designers), and are a keystone of the VersIC/ProjectIC development effort.

We also have a new white paper for your edification that discusses a release methodology for analog designers. Analog folks have their own very specific requirements when it comes to making IP and project releases, and we’ve been working really hard to facilitate that in our tools. Note that this white paper is the first in a series we’ll be publishing that discusses our vision in this area.

So, welcome to our December newsletter.  Here's wishing you happy holidays and a prosperous 2015!  I look forward to welcoming more of you to the Methodics family in the near future!

Speeding Up IP Data Management

Speeding Up IP Data Management

IP and Data Management (DM) for SoC teams has gradually moved from ad-hoc approaches using simple Excel spreadsheets, to home-grown software that is specific to a project or company, and finally to commercially supported tools.

IP Management Update at DAC

IP Management Update at DAC

To keep track of my business and personal finances I use software from Quicken, but for an SoC with hundreds of IP blocks how do you keep track of everything? 

Automating Analog Design in Virtuoso

Automating Analog Design in Virtuoso

Digital designers have been automating the functional verification process for many years now, however when you talk to an analog designer about how they do verification you quickly realize that the typical process is quite ad-hoc and little automated.

Read More

IP Reigns Supreme in SoC Design

IP Reigns Supreme in SoC Design

At the recent Semico IMPACT Summit there were a number of interesting presentations and panels that touched on the fundamental changes that IP is driving in SoC design. The topics covered a lot of different ground, but a consistent message is that the relevance of IP has never been greater and that good things lie ahead for all those involved. 

For us at Methodics the most interesting part was the data presented on how much reuse is now occurring and how quickly it is growing (up to 85% over the next few years). It seems that we are not alone, as SemiWiki just sat down with CEO Simon Butler to get his thoughts on the growth of IP, and how it will impacts customers.

The key takeaway from the interview is that as IP grows, so to does the need for IP Lifecycle Management. Rather than me repeat it here, click below to get the information straight from the source.  

Using Releases for Analog IC Design

Using Releases for Analog IC Design

In a typical analog IC design team, multiple engineers and layout professionals work on cells and libraries. At various points during the design process they will commit changes to their designs into the Design Management (DM) system that manages their files – be it Subversion, Perforce or some other commercial tool.

Read more

Bringing Sanity to Analog IC Design Verification using Regressions

Bringing Sanity to Analog IC Design Verification using Regressions

Two weeks ago I blogged about analog verification and it started a discussion with 16 comments, so l've found that our readers have an interest in this topic. For decades now the Digital IC design community has used and benefited from regression testing as a way to measure both design quality and progress, ensuring that first silicon will work with a higher degree of confidence.

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