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ISO 26262 Traceability Requirements for Automotive Electronics Design

ISO 26262 Traceability Requirements for Automotive Electronics Design

Reading the many articles on SemiWiki and other publications we find experts talking about the automotive market, mostly because it's in growth mode, has large volumes and vehicles consume more semiconductors every year. OK, that's on the plus side, but what about functional safety for automotive electronics? Every time that an autonomous car has an accident or a fatality it makes front page news on CNN and across social media, so we're keen to understand how safety is supposed to protect us from driving mishaps. The automotive industry has already published a functional safety standard known as ISO 26262, which is a necessary first step, and for us in the design community we need to be aware that this standard mandates traceability requirements. 

 CLICK HERE to read the SemiWiki article:

Combining IP and Product Lifecycle Tools

Combining IP and Product Lifecycle Tools

Systems design has been around for decades and has been enabled by the widespread use of Product Lifecycle Management (PLM) tools that help manage the process of starting with an idea then tracking details through the end of life.  Our own semiconductor industry caught hold of the PLM concepts first from the mechanical CAD companies looking for new markets, so they really focused on "part" management and some design process data.  

Today, as design nodes get smaller and smaller, the associated data sets are exploding and companies are adopting IP reuse strategies to remain profitable by leveraging their existing assets. This means big incentives to integrate a PLM tool at the system level along with a semiconductor IP Lifecycle Management (IPLM) tool, creating a coherent process across the entire product lifecycle.

CLICK HERE to read the SemiWiki article:(URL:  https://www.semiwiki.com/forum/content/7374-combining-ip-product-lifecycle-tools.html)

SoC Design Management with Git

SoC Design Management with Git

While Git is a very popular data management tool for software developers, there are many good reasons to pick a different solution for SoC design.  For starters, Git is designed to control text files, not binary files.  Also, there are recommended limits on the total repository size as well as file sizes.  So what is the recommended alternative?

 

CLICK HERE to read the SemiWiki article.(URL:  https://www.semiwiki.com/forum/content/7298-soc-design-management-git.html)

Hierarchy Applied to Semiconductor IP Reuse

Hierarchy Applied to Semiconductor IP Reuse

When I first started doing IC design back in 1978 we had hierarchical designs, and that was doing a relatively simple 16Kb DRAM chip with only 32,000 transistors using 6um (aka 6,000 nm) design rules. SoC designs today make massive use of hierarchy at all levels of IC design: IC Layout, transistor netlist, gate level netlist, RTL level, C or SystemC level, embedded software, software drivers, firmware. Our semiconductor IC business is based on both IP and EDA tools being able to handle hierarchy effectively.

CLICK HERE  to read the article

Rethinking IP Lifecycle Management

Rethinking IP Lifecycle Management

We recently saw both Apple and Samsung introduce new smart phones, and realize that the annual race to introduce sophisticated devices that are attractive and differentiated is highly competitive. If either of these companies misses a market window then fortunes can quickly change. SoCs with billions of transistors like smart phone processors make semiconductor IP re-use a central approach in design productivity, instead of starting from scratch for each new generation.

CLICK HERE  to read the article

NEW CONCEPTS IN SEMICONDUCTOR IP LIFECYCLE MANAGEMENT

NEW CONCEPTS IN SEMICONDUCTOR IP LIFECYCLE MANAGEMENT

Right before #54DAC I participated in a webinar with Methodics on "New Concepts in Semiconductor IP Lifecycle Management" with Simon Butler, CEO of Methodics, Michael Munsey, Vice President of Business Development and Strategic Accounts, and Vishal Moondhra, Vice President of Applications. The webinar introduced “percipient” and how it will not only extend IP Lifecycle Management, but allow for the modeling of the entire design ecosystem. Percipient was then featured in the Methodics booth at #54DAC with demos and presentations. 

CLICK HERE  to read the article.

THE SEMICONDUCTOR BRIDGE: A CONNECTED IPLM

THE SEMICONDUCTOR BRIDGE: A CONNECTED IPLM

Electronic Design Magazine, June 26, 2017


Development processes in large semiconductor organizations need to scale, and they can do so by adopting the same flexibility and agile principles as software companies.

CLICK HERE to read the article.

Webinar -New Concepts in Semiconductor IP Lifecycle Management

Webinar -New Concepts in Semiconductor IP Lifecycle Management

The semiconductor IP market continues growing at a healthy rate, and IP reuse is a staple of all modern SoC designs. Along with the acceptance of IP reuse comes a host of growing challenges, like:
 

  • Increase in design files
  • Increase in meta-data
  • More links between design members worldwide
  • More links between data in multiple engineering systems


Companies like Methodics have been serving the IP lifecycle management segment for many years now, however there comes a point where the increases in design complexity call for a new approach, so to find out what is coming next you are invited to a webinar where their next generation platform is being unveiled:

CLICK HERE  to read the article.

NEW CONCEPTS IN SEMICONDUCTOR IP LIFECYCLE MANAGEMENT

NEW CONCEPTS IN SEMICONDUCTOR IP LIFECYCLE MANAGEMENT

Excel is a wonderful, general purpose spreadsheet tool that lets me organize and analyze rows and columns of data into something meaningful, however it doesn't know anything about requirements traceability for complex semiconductor projects. So why do so many engineering teams still rely upon Excel or custom, in-house tools? It's probably because of perceived lower costs, institutional momentum, and the typical NIH (Not Invented Here) syndrome. Safety critical industries like automotive, aircraft and medical all have standards that must be adhered to during the design process, and they share a common need - requirements traceability from concept through production. Two software companies have teamed up to integrate their toolsets into something that really does help teams achieve requirements traceability, Jama Software and Methodics. I just attended their joint webinar and will share what they talked about.

CLICK HERE  to read the article.

CTO Interview: Peter Theunis of Methodics

CTO Interview: Peter Theunis of Methodics

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CLICK TO DOWNLOAD

Fascinated by computers at a very young age, Peter got his degree in Computer Science and was brought to the Bay Area via AIESEC Berkeley’s student exchange program to write his thesis. He has now more than 15 years of professional experience in software engineering, large scale systems architecture and data center engineering in Silicon Valley startups as well as with Yahoo! where he spent the last 9 years as a systems architect and principal engineer.

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SoC integration using IP Lifecycle Management Methodology

SoC integration using IP Lifecycle Management Methodology

Small EDA companies often focus on a single point tool and then gradually over time they add new, complementary tools to start creating more of a sub-flow to help you get that next SoC project out on time. The most astute EDA companies often choose to partner with other like-minded companies to create tools that work together well, so that your CAD department doesn't have to cobble together a working solution. I was pleased to find two such EDA companies that have worked well together on SoC integration using IP lifecycle management methodology, Methodics and Magillem

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IP Reuse Requires a Single-Source-of-Truth

IP Reuse Requires a Single-Source-of-Truth

As semiconductor companies adopt IP reuse strategies to improve engineering efficiencies and achieve time-to-market advantages, modern data management (DM) tools are built on industry standard version control systems that provide a "single-source-of-truth" architecture.  

In his latest article "IC Design Management: Build or Buy?" on SemiWiki, Daniel Payne discusses the benefits of this architecture in contrast to  commercial or homegrown systems built around an older style "server-per-project" architecture.

You can read the complete article here:  https://www.semiwiki.com/forum/content/6388-ic-design-management-build-buy.html

All Things IP: SemiWiki's Daniel Nenni interviews Methodics CEO, Simon Butler

All Things IP: SemiWiki's Daniel Nenni interviews Methodics CEO, Simon Butler

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CLICK TO DOWNLOAD

"IP" and "IP Reuse" mean different things to different people.  For many years, Methodics has been helping semiconductor companies implement IP reuse strategies.  In this interview, Simon covers important trends in methodologies that help customers stay competitive in the face of ever-tightening margins.  

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5 Reasons Why Platform Based Design Can Help Your Next SoC

5 Reasons Why Platform Based Design Can Help Your Next SoC

Semiconductor design IP and verification IP have been around for decades, but just because your company has lots of IP doesn't mean that you're getting all of the benefits of a design reuse methodology.  Here are 5 reasons why platform based design can help your next SoC.

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Go Native - With Methodics at DAC in Austin

Go Native - With Methodics at DAC in Austin

DAC 2016 in Austin will be another exciting event for Methodics.  We'll be featuring the second major release of our IP Lifecycle Management platform, ProjectIC, along with a new release of WarpStor, our partnerships with Perforce and Magillem, hula dancers, and much more!

Untitled Document
Methodics News

Welcome to Our DAC 2016 Newsletter!


Hi there, and welcome to the last newsletter before the main conference of the year, DAC!

This is going to be our best DAC ever! I know, I know, all vendors like to say that, but for us this year its really true.

First up, we have some incredible live Hawaiian dance performances at our booth (twice daily) to break up the demo/sales-pitch/swag-grab grind. This is part of our “Go Native” theme for integrating native data tools (such as Perforce) into our IP Management flow. Every other vendor in the data/IP management space is trying to sell you a proprietary “closed” system solution, ultimately with the goal of locking you in. Don’t do it! .. Go Native!

And by the way, we'll have several of our friends from Perforce joining us at our booth this year too.  Please be sure to stop by to meet with them and hear more about the advantages of adopting native Perforce.

Also we’ll be announcing the next release of our flagship product, the ProjectIC 2.0 IP Lifecycle Management (IPLM) solution with a focus on Platform Based Design. This new release is a major step forward for us and includes performance improvements, richer API’s, and some killer new features. Platform Based Design is a process that is getting increasing amounts of traction in today's IP-centric Semiconductor design environment.  How ProjectIC 2.0 can facilitate this is discussed in a new white paper here.

Finally, we’ll be announcing a new release of WarpStor with new features and integrations to help reduce your workspace creation/management and release bottlenecks. We’ll also be presenting some customer success stories to help explain how this technology has helped other companies in the Semiconductor space.

I hope to see all of you in Austin on June 6th!

Best Regards,
Simon

P.S. - If one or more of the topics covered in this newsletter grabs your interest, please email dac16@methodics.com and let us know if you'd like to hear more about it.

DAC 2016 Logo

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ProjectIC Logo



WarpStor Logo



VersIC Logo



Perforce Logo






Come see us at DAC 2016 in Austin

It's DAC time again, and Methodics once again has a lot happening!  Please visit us at booth #1019 at the Austin Convention Center, to learn about  exciting advances in our technology:

  • ProjectIC v2.0 - This second major release of our flagship IP Lifecycle Management (IPLM) solution enables platform-based design... an industry-first!

  • WarpStor - our engineering workspace, diskspace, and IO bandwidth optimizer is helping customers drastically reduce costs and improve time-to-market.  See the links below for customer success stories.

  • Integration with Magillem tools to provide a fully synchronized IPLM and SoC assembly environment, assuring that designs can be quickly assembled and kept up to date with changes in the underlying IP.

We are also excited to be involved in other activities around the show including a presentation at the Cadence Theater at 1:30pm on Wednesday, June 8 titled "IP Lifecycle Management - Enabling Platform Based Design"

To pre-schedule a private meeting at our booth or learn more, email dac16@methodics.com.

And, on a final note...  Please drop by our booth to pick up a special gift and qualify for our our daily fitbit give-away!


Magillem Logo


Hawaiian Lei

Fitbit One
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White Paper: Meeting Time-to-Market and Cost Reduction Goals Through Platform Based Design

   by: Michael Munsey, VP of Business Development and Strategic Accounts

Companies designing today's complex System-on-Chips (SoC’s) must find new ways to meet the challenges imposed by shrinking time-to-market windows and cost pressures.  Platform based design methodologies allow companies to reduce the time it takes to bring designs to market and maximize reuse of internal IP on those designs.

A platform is the starting point for a new or derivative design that contains all of the IP and design meta data properly configured to be downloaded to a user's workspace.  To enable a platform based design methodology, companies must formalize how design IP is handled.

By adopting an IP Lifecycle Management solution (IPLM), companies can benefit from streamlining the SoC development process and guarantee that IP is being fully utilized through all of the company’s design projects.

read more >>


Website Highlights

Whitepaper: Meeting Time-to-Market and Cost Reduction Goals Through Platform Based Design
Press Release: Methodics Expands Worldwide Sales Team to Meet Strategic Initiatives
Press Release:
Methodics and Magillem Team Up to Deliver an Industry First IP Assembly Platform Based Development Environment
Award Announcement: Methodics receives 2016 Perforce award for "Most Innovative Integration"
SemiWiki Blog: Bulking Up of Design Data Calls for Version Control on Steroids
WarpStor Case Study 1: A U.S. Based Flash Memory Company
WarpStor Case Study 2
: A Fabless SoC Design Company

Version Control on 'Steroids'.

Version Control on 'Steroids'.

Most design teams - be it semiconductor designers, artists, video producers, game developers - are struggling with an unprecedented deluge of data. Design workspaces have grown, often into multiple Gigabytes, sometimes into 100’s of Gigabytes.

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Because of this, the version control tool is constantly under pressure to serve large amounts of data to individual workspaces. These workspaces consume terabytes of data on the filers, and the networks are clogged by NFS moving data between filers and mounting the resulting workspaces onto clients. And additional workflows, such as Continuous Integration (CI), make the situation even worse. 

However, there is a clear structure inherently associated with each user's workspace.  This structure can be analyzed and leveraged to build very compelling solutions to reduce the load on the version control tools, putting them on figurative ‘steroids’.  This paper presents such a methodology and solution.

Methodics at CDN Live - Israel 2014

Methodics at CDN Live - Israel 2014

Methodics makes a point at appearing with our good Partner Cadence at most of their CDN Live events. We'll be continuing this tradition by appearing at the Israel CDN Live event next week. Please email us if you'd like to setup a demo of any of the Methodics IP Management solutions - events@methodics.com

The Benefits of Going Industry Standard

The Benefits of Going Industry Standard

Should a semiconductor/IP company use a proprietary data-management (DM) environment? Or even develop their own? After all, every company is unique and developing a unique DM allows a perfect match of just what is required for that particular company. And, in principle, a proprietary DM system can underpin the design management solution perfectly.  Or maybe not...

For the top 10 reasons to use industry standard data management, read Paul McLellan's SemiWiki blog here.

Methodics Receives "2016 Versionary" Award

Methodics Receives "2016 Versionary" Award

Methodics was proud to have participated as a speaker and a sponsor at the Perforce 2016 MERGE conference, held recently in San Francisco from April 13 to 15, 2016.

During the conference, we presented ways that mutual customers can dramatically reduce the load on their network, storage filers, and Perforce servers while also making very large, near-instant workspaces available to users.

As a result of our participation, we had lots of great discussions directly with customers.  These opportunities are always valuable to keeping our product roadmaps on track. 

During the conference we were awarded the 2016 "Versionary" award for "Most Innovative Integration". Thanks for the recognition Perforce! and thanks to all our customers that made this possible.

Pictured left-to-right are Simon Butler (Methodics Founder and CEO), Jerry Brocklehurst (Methodics VP of Worldwide Sales & Marketing), and Chris Dobbrow (Perforce VP of Strategy and Key Accounts)

What SOC Size Growth Means for IP Management

What SOC Size Growth Means for IP Management

SemiWiki's Tom Simon interviews Simon Butler:  Given the size and complexity of today's SoC designs, IP reuse has become both a mantra and a mandate within most semiconductor companies.  For insight into how companies can improve their margins, Tom Simon of SemiWiki recently interviewed Methodics' CEO, Simon Butler.  Please click here to read the interview titled "What SOC Size Growth Means for IP Management" on SemiWiki.