Please enable javascript in your browser to view this site!

Viewing entries tagged
ticker

An Innovative SoC Integration Workflow

An Innovative SoC Integration Workflow

CLICK TO DOWNLOAD

CLICK TO DOWNLOAD

SoC Integration is a challenging and important task that all hardware teams undertake on a regular basis.

A SoC is typically made up of series of IPs, each of which could also be a sub-system in its own right. The key role of integration is to accept new releases of the component IPs and/or sub-systems, and verify whether these newer releases work in the context of the SoC.  The releases that are available for integration should have passed some quality control of their own - i.e. basic checks that ensure that the release that is available for integration satisfies a minimum quality level, and moves the SoC forward. 

This white paper describes an integration flow methodology, and how various roles involved in the process - integrator, contributor, and consumer - interact to assure successful integration of component IPs and sub-systems.

projectic_based_soc_int_flow.jpg

Problems and Challenges of Using PLM in a Semiconductor Design Environment

Problems and Challenges of Using PLM in a Semiconductor Design Environment

CLICK TO DOWNLOAD

CLICK TO DOWNLOAD

Product Lifecycle Management (PLM) was first introduced by automobile and defense companies in the mid 1980’s with the goal of reducing development cost and speeding up the product development process.

While PLM systems have seen success in these and other industries with large design teams and well established methodologies, the adoption rate in the semiconductor space has been slow. This can be attributed to a number of factors.

This white paper discusses the problems and challenges of trying to use a PLM system in the semiconductor design environment and presents an alternative solution that provides the most critical functions of a PLM system, but without the cost and increased maintenance overhead.