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A modern integrated circuit design commonly incorporates a large number of intellectual property (IP) blocks from a variety of sources. The team of designers tasked with creating a system on a chip (SOC) from these IP blocks may be composed of many contributors who span multiple organizational units and geographical regions. The need to restrict access to sensitive design information contained in the IP may result from concerns ranging from trade secret protection to international regulatory concerns. These factors and others lead to the need for robust and flexible access control mechanisms for the IP that make up a complete design. Tools for applying and auditing designer’s access to design objects are key components of an IP management system.