Please enable javascript in your browser to view this site!

A typical chip design project consists of several designers with a diverse mix of disciplines, each working on a different aspect of the design with different flows, and generating large amounts of diverse data.  For example, there are RTL and verification teams, analog and mixed signal designers, layout engineers and silicon engineering teams.  In this environment, data management tools like Perforce Helix manage a substantial portion of the data.

CLICK TO DOWNLOAD

CLICK TO DOWNLOAD

Our latest white paper, written in partnership with Perforce, that presents a list of the unique challenges associated with the many diverse sets of data generated during hardware design, and discusses the advantages of adopting a release-based flow versus a branch/merge flow.